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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2020-03-16 11:38:43 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-03-16 20:28:26 +0000 |
| commit | f899f786d181e03f6ca29319bd90ba62231cb44b (patch) | |
| tree | b2c4ca26b16b1df349ce393c2ab24d82ef36ec36 /drivers/gpu/drm/i915/selftests | |
| parent | a62774782b994026ac3198bf115717d55d536166 (diff) | |
| download | linux-f899f786d181e03f6ca29319bd90ba62231cb44b.tar.bz2 | |
drm/i915: Move GGTT fence registers under gt/
Since the fence registers control HW detiling through the GGTT
aperture, make them a part of the intel_ggtt under gt/
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200316113846.4974-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/selftests')
| -rw-r--r-- | drivers/gpu/drm/i915/selftests/i915_gem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c index 623759b73bb4..7ea517a21e0b 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c @@ -125,7 +125,7 @@ static void pm_resume(struct drm_i915_private *i915) */ with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915_ggtt_resume(&i915->ggtt); - i915_gem_restore_fences(&i915->ggtt); + intel_ggtt_restore_fences(&i915->ggtt); i915_gem_resume(i915); } |