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authorShashank Sharma <shashank.sharma@intel.com>2015-09-01 19:41:46 +0530
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-10-02 14:45:51 +0200
commitce0c982152137789e6f09e9d8712034088adf3aa (patch)
tree084e10b2769d97dd488696742b11a1b6c8fc5ab0 /drivers/gpu/drm/i915/intel_dsi.h
parentbaeac68a82f07f7c37bfc3d9624127b813a8d8b4 (diff)
downloadlinux-ce0c982152137789e6f09e9d8712034088adf3aa.tar.bz2
drm/i915/bxt: get DSI pixelclock
BXT's DSI PLL is different from that of VLV. So this patch adds a new function to get the current DSI pixel clock based on the PLL divider ratio and lane count. This function is required for intel_dsi_get_config() function. v2: Fixed Jani's review comments. Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.h')
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 797a61245495..e6cb25239941 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -127,6 +127,7 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
+extern u32 bxt_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
extern void intel_dsi_reset_clocks(struct intel_encoder *encoder,
enum port port);