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| author | José Roberto de Souza <jose.souza@intel.com> | 2018-11-30 15:20:48 -0800 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2018-12-03 14:55:41 -0800 |
| commit | d53db442db36fdba1a6584bd5cf49124ba17d6e9 (patch) | |
| tree | 7eabedbbcf8e66ffd84b08fcc2eb1efe31f1e269 /drivers/gpu/drm/i915/intel_device_info.h | |
| parent | e1bf094b3c7514934168dcb69f18b65aacb5a953 (diff) | |
| download | linux-d53db442db36fdba1a6584bd5cf49124ba17d6e9.tar.bz2 | |
drm/i915: Move display device info capabilities to its own struct
This helps separate what capabilities are display capabilities.
v3: Moving display struct right after flags (Lucas)
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181130232048.14216-2-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.h | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 88f97210dc49..1caf24e2cf0b 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -89,35 +89,38 @@ enum intel_ppgtt { func(is_alpha_support); \ /* Keep has_* in alphabetical order */ \ func(has_64bit_reloc); \ - func(has_csr); \ - func(has_ddi); \ - func(has_dp_mst); \ func(has_reset_engine); \ - func(has_fbc); \ func(has_fpga_dbg); \ - func(has_gmch_display); \ func(has_guc); \ func(has_guc_ct); \ - func(has_hotplug); \ func(has_l3_dpf); \ func(has_llc); \ func(has_logical_ring_contexts); \ func(has_logical_ring_elsq); \ func(has_logical_ring_preemption); \ - func(has_overlay); \ func(has_pooled_eu); \ - func(has_psr); \ func(has_rc6); \ func(has_rc6p); \ func(has_runtime_pm); \ func(has_snoop); \ func(has_coherent_ggtt); \ func(unfenced_needs_alignment); \ + func(hws_needs_physical); + +#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ + /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ - func(hws_needs_physical); \ + func(has_csr); \ + func(has_ddi); \ + func(has_dp_mst); \ + func(has_fbc); \ + func(has_gmch_display); \ + func(has_hotplug); \ + func(has_ipc); \ + func(has_overlay); \ + func(has_psr); \ func(overlay_needs_physical); \ - func(supports_tv); \ - func(has_ipc); + func(supports_tv); #define GEN_MAX_SLICES (6) /* CNL upper bound */ #define GEN_MAX_SUBSLICES (8) /* ICL upper bound */ @@ -172,6 +175,13 @@ struct intel_device_info { #define DEFINE_FLAG(name) u8 name:1 DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG); #undef DEFINE_FLAG + + struct { +#define DEFINE_FLAG(name) u8 name:1 + DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG); +#undef DEFINE_FLAG + } display; + u16 ddb_size; /* in blocks */ /* Register offsets for the various display pipes and transcoders */ |