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authorVandita Kulkarni <vandita.kulkarni@intel.com>2019-03-25 16:56:42 +0530
committerJani Nikula <jani.nikula@intel.com>2019-04-10 15:39:45 +0300
commit942d1cf48eae3fcd7e973cfb708d5c4860f0c713 (patch)
tree5d022c5406398f8328bd4b62b094f18f0664b763 /drivers/gpu/drm/i915/intel_ddi.c
parentc5b81a325263a891d5811aabe938c87e03db4c37 (diff)
downloadlinux-942d1cf48eae3fcd7e973cfb708d5c4860f0c713.tar.bz2
drm/i915/icl: Fix port disable sequence for mipi-dsi
Re-enable clock gating of DDI clocks. v2: Fix the default ddi clk state for mipi-dsi (Imre) Fixes: 1026bea00381 ("drm/i915/icl: Ungate DSI clocks") Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1553513202-13863-2-git-send-email-vandita.kulkarni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 0ab3a8a43848..3ae55274056c 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2802,10 +2802,10 @@ void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
return;
}
/*
- * DSI ports should have their DDI clock ungated when disabled
- * and gated when enabled.
+ * For DSI we keep the ddi clocks gated
+ * except during enable/disable sequence.
*/
- ddi_clk_needed = !encoder->base.crtc;
+ ddi_clk_needed = false;
}
val = I915_READ(DPCLKA_CFGCR0_ICL);