diff options
author | James Ausmus <james.ausmus@intel.com> | 2019-10-09 10:23:15 -0700 |
---|---|---|
committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2019-10-10 11:00:47 -0700 |
commit | da80f04792fc0dddcc44201cb4ee96cb011755b6 (patch) | |
tree | 9b00f89e9a08fb4c0548fe9ddf7226598bce1abf /drivers/gpu/drm/i915/i915_reg.h | |
parent | b068a86071ca743de28a607a0b22b41b1a3f5fb3 (diff) | |
download | linux-da80f04792fc0dddcc44201cb4ee96cb011755b6.tar.bz2 |
drm/i915/tgl: Read SAGV block time from PCODE
Starting from TGL, we now need to read the SAGV block time via a PCODE
mailbox, rather than having a static value.
BSpec: 49326
v2: Fix up pcode val data type (Ville), tighten variable scope (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: James Ausmus <james.ausmus@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191004221449.1317-2-james.ausmus@intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/20191009172315.11004-2-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1dc067fc57ab..0fb9030b89f1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8878,6 +8878,7 @@ enum { #define GEN9_SAGV_DISABLE 0x0 #define GEN9_SAGV_IS_DISABLED 0x1 #define GEN9_SAGV_ENABLE 0x3 +#define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US 0x23 #define GEN6_PCODE_DATA _MMIO(0x138128) #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8 #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16 |