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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-08-18 14:42:44 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-09-03 11:04:49 +0200
commit2bb25c17bbe032eecaffa401dbc21809a3f8e44a (patch)
tree36ea5ee0388abed1e3c355908fc54e99d3f6e3a4 /drivers/gpu/drm/i915/i915_reg.h
parentb98971271bf4c4566db2133ad0a36e4f24819fbe (diff)
downloadlinux-2bb25c17bbe032eecaffa401dbc21809a3f8e44a.tar.bz2
drm/i915: Populate mem_freq in init_gt_powerwave()
init_clock_gating() is too late to read out the mem_freq. We already want to print out the GPU MHz numbers before it's called. Move the mem_freq setup to init_gt_powersave(). v2: Also kill the CHV_CZ_CLOCK_FREQ_MODE_* defines Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Deepak S <deepak.s@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 559c7f870cf1..04461141a3ea 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5650,12 +5650,6 @@ enum punit_power_well {
GEN6_PM_RP_DOWN_THRESHOLD | \
GEN6_PM_RP_DOWN_TIMEOUT)
-#define CHV_CZ_CLOCK_FREQ_MODE_200 200
-#define CHV_CZ_CLOCK_FREQ_MODE_267 267
-#define CHV_CZ_CLOCK_FREQ_MODE_320 320
-#define CHV_CZ_CLOCK_FREQ_MODE_333 333
-#define CHV_CZ_CLOCK_FREQ_MODE_400 400
-
#define GEN7_GT_SCRATCH_BASE 0x4F100
#define GEN7_GT_SCRATCH_REG_NUM 8