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authorBen Widawsky <ben@bwidawsk.net>2013-07-16 16:50:06 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-07-17 22:23:43 +0200
commit93bd8649dba3155d1a0ba2a902d9c49f1c75a1da (patch)
tree50d29aad6fd49dcbab1e3c0d4ff40d9bc6c4b9b2 /drivers/gpu/drm/i915/i915_gem_evict.c
parent853ba5d2231619e1c7f7de1269e135174ec8e3cb (diff)
downloadlinux-93bd8649dba3155d1a0ba2a902d9c49f1c75a1da.tar.bz2
drm/i915: Put the mm in the parent address space
Every address space should support object allocation. It therefore makes sense to have the allocator be part of the "superclass" which GGTT and PPGTT will derive. Since our maximum address space size is only 2GB we're not yet able to avoid doing allocation/eviction; but we'd hope one day this becomes almost irrelvant. v2: Rebased Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_evict.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_evict.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
index 5f8afc48bb7e..f1c9ab096b00 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -78,12 +78,12 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
INIT_LIST_HEAD(&unwind_list);
if (mappable)
- drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
- min_size, alignment, cache_level,
- 0, dev_priv->gtt.mappable_end);
+ drm_mm_init_scan_with_range(&dev_priv->gtt.base.mm, min_size,
+ alignment, cache_level, 0,
+ dev_priv->gtt.mappable_end);
else
- drm_mm_init_scan(&dev_priv->mm.gtt_space,
- min_size, alignment, cache_level);
+ drm_mm_init_scan(&dev_priv->gtt.base.mm, min_size, alignment,
+ cache_level);
/* First see if there is a large enough contiguous idle region... */
list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) {