diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-10-03 17:02:31 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-10-04 18:43:49 +0300 |
commit | 7d423af9bfb172c3802cc1ca6591ac608c26a311 (patch) | |
tree | a033751e6a98098bd8e6236fc150e2e0a3a2371a /drivers/gpu/drm/i915/i915_drv.h | |
parent | 7842793330ce96ac1d20d22901fb4009c21676f2 (diff) | |
download | linux-7d423af9bfb172c3802cc1ca6591ac608c26a311.tar.bz2 |
drm/i915: Implement a better i945gm vblank irq vs. C-states workaround
The current "disable C3+" workaround for the delayed vblank
irqs on i945gm no longer works. I'm not sure what changed, but
now I need to also disable C2. I also got my hands on a i915gm
machine that suffers from the same issue.
After some furious poking of registers I managed to find a
better workaround: The "Do not Turn off Core Render Clock in C
states" bit. With that I no longer have to disable any C-states,
and as a nice bonus the power cost is only ~1/4 of the
"disable C3+" method (which mind you doesn't even work anymore,
and so would have an even higher power cost if we made it work
by also disabling C2).
So let's throw out all the cpuidle/qos crap and just toggle
the magic bit as needed. And we extend the workaround to cover
i915gm as well.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191003140231.24408-1-ville.syrjala@linux.intel.com
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 35b610d52379..cde4c7fb5570 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1701,13 +1701,8 @@ struct drm_i915_private { } contexts; } gem; - /* For i945gm vblank irq vs. C3 workaround */ - struct { - struct work_struct work; - struct pm_qos_request pm_qos; - u8 c3_disable_latency; - u8 enabled; - } i945gm_vblank; + /* For i915gm/i945gm vblank irq workaround */ + u8 vblank_enabled; /* perform PHY state sanity checks? */ bool chv_phy_assert[2]; |