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| author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2013-04-23 13:34:38 +0200 |
|---|---|---|
| committer | Inki Dae <inki.dae@samsung.com> | 2013-04-29 14:35:32 +0900 |
| commit | 5186fc5e8eda184935467aa84295b2897166fecd (patch) | |
| tree | 98df35e733476b5775a4cc91c3d0706328580a4e /drivers/gpu/drm/exynos/regs-fimc.h | |
| parent | e5f8683923af2fd2bb0c5a7c0a66597cc6b50ef3 (diff) | |
| download | linux-5186fc5e8eda184935467aa84295b2897166fecd.tar.bz2 | |
drm/exynos: add device tree support for fimc ipp driver
This patch adds OF initialization support for the FIMC driver.
The binding documentation can be found at Documentation/devicetree/
bindings/media/samsung-fimc.txt.
The syscon regmap interface is used to serialize access to the
shared CAMBLK registers from within the V4L2 FIMC-IS and the DRM
FIMC drivers. The DRM driver uses this interface for setting up
the FIFO data link between FIMD and FIMC IP blocks, while the V4L2
one for setting up a data link between the camera ISP and FIMC for
camera capture. The CAMBLK registers are not accessed any more
through a statically mapped IO. Synchronized access to these
registers is required for simultaneous operation of the camera
ISP and the DRM IPP on Exynos4x12.
The driver data and driver_ids static data structures are removed
since Exynos4 is going to be a dt-only platform and there is
currently no board file in mainline that defines platform data
for the FIMC IPP, i.e. uses it.
Camera input signal polarities are not currently parsed from the
device tree.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/regs-fimc.h')
| -rw-r--r-- | drivers/gpu/drm/exynos/regs-fimc.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/exynos/regs-fimc.h b/drivers/gpu/drm/exynos/regs-fimc.h index b4f9ca1fd851..30496134a3d0 100644 --- a/drivers/gpu/drm/exynos/regs-fimc.h +++ b/drivers/gpu/drm/exynos/regs-fimc.h @@ -661,9 +661,8 @@ #define EXYNOS_CLKSRC_SCLK (1 << 1) /* SYSREG for FIMC writeback */ -#define SYSREG_CAMERA_BLK (S3C_VA_SYS + 0x0218) -#define SYSREG_ISP_BLK (S3C_VA_SYS + 0x020c) -#define SYSREG_FIMD0WB_DEST_MASK (0x3 << 23) -#define SYSREG_FIMD0WB_DEST_SHIFT 23 +#define SYSREG_CAMERA_BLK (0x0218) +#define SYSREG_FIMD0WB_DEST_MASK (0x3 << 23) +#define SYSREG_FIMD0WB_DEST_SHIFT 23 #endif /* EXYNOS_REGS_FIMC_H */ |