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| author | Mihail Atanassov <mihail.atanassov@arm.com> | 2017-02-06 12:20:56 +0000 |
|---|---|---|
| committer | Liviu Dudau <Liviu.Dudau@arm.com> | 2017-04-24 13:28:08 +0100 |
| commit | 0274e6a0ba9a4994a449fcd3483ef530027e152f (patch) | |
| tree | dde8a491de30aae9a9b98c26275a5610f72979aa /drivers/gpu/drm/arm/malidp_regs.h | |
| parent | 28ce675b74742cae1c815970347267b45dc73a8a (diff) | |
| download | linux-0274e6a0ba9a4994a449fcd3483ef530027e152f.tar.bz2 | |
drm: mali-dp: Enable image enhancement when scaling
Apply image enhacement when we are upscaling by a factor of 2
or more in either direction.
Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'drivers/gpu/drm/arm/malidp_regs.h')
| -rw-r--r-- | drivers/gpu/drm/arm/malidp_regs.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/arm/malidp_regs.h b/drivers/gpu/drm/arm/malidp_regs.h index 91d2ba5729bf..2039f857f77d 100644 --- a/drivers/gpu/drm/arm/malidp_regs.h +++ b/drivers/gpu/drm/arm/malidp_regs.h @@ -109,6 +109,8 @@ /* Scaling engine registers and masks. */ #define MALIDP_SE_SCALING_EN (1 << 0) #define MALIDP_SE_ALPHA_EN (1 << 1) +#define MALIDP_SE_ENH_MASK 3 +#define MALIDP_SE_ENH(x) (((x) & MALIDP_SE_ENH_MASK) << 2) #define MALIDP_SE_RGBO_IF_EN (1 << 4) #define MALIDP550_SE_CTL_SEL_MASK 7 #define MALIDP550_SE_CTL_VCSEL(x) \ @@ -139,6 +141,17 @@ #define MALIDP_SE_COEFFTAB_DATA_MASK 0x3fff #define MALIDP_SE_SET_COEFFTAB_DATA(x) \ ((x) & MALIDP_SE_COEFFTAB_DATA_MASK) +/* Enhance coeffents reigster offset */ +#define MALIDP_SE_IMAGE_ENH 0x3C +/* ENH_LIMITS offset 0x0 */ +#define MALIDP_SE_ENH_LOW_LEVEL 24 +#define MALIDP_SE_ENH_HIGH_LEVEL 63 +#define MALIDP_SE_ENH_LIMIT_MASK 0xfff +#define MALIDP_SE_SET_ENH_LIMIT_LOW(x) \ + ((x) & MALIDP_SE_ENH_LIMIT_MASK) +#define MALIDP_SE_SET_ENH_LIMIT_HIGH(x) \ + (((x) & MALIDP_SE_ENH_LIMIT_MASK) << 16) +#define MALIDP_SE_ENH_COEFF0 0x04 /* register offsets and bits specific to DP500 */ #define MALIDP500_ADDR_SPACE_SIZE 0x01000 |