diff options
author | Kenneth Feng <kenneth.feng@amd.com> | 2018-03-28 17:58:03 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-04-03 13:08:43 -0500 |
commit | 5d41535c5d66b0a9ad2b7d5d1a72025cbca13ed2 (patch) | |
tree | bd55fac0cb7a44405ef6ab75c1c612af46874276 /drivers/gpu/drm/amd | |
parent | 4a8e06f7aad797e92413a3042d09d3b385fa1fda (diff) | |
download | linux-5d41535c5d66b0a9ad2b7d5d1a72025cbca13ed2.tar.bz2 |
drm/amd/powerplay: Enable ACG SS feature
Port the atomfirmware.h and populates the
updated pptable to SMU.With the new parameters
in the new pptable, the ACG SS feature is enabled.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
5 files changed, 39 insertions, 18 deletions
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h index 3ae3da4e7c14..0f5ad54d3fd3 100644 --- a/drivers/gpu/drm/amd/include/atomfirmware.h +++ b/drivers/gpu/drm/amd/include/atomfirmware.h @@ -1264,9 +1264,9 @@ struct atom_smc_dpm_info_v4_1 uint8_t ledpin2; uint8_t padding8_4; - uint8_t gfxclkspreadenabled; - uint8_t gfxclkspreadpercent; - uint16_t gfxclkspreadfreq; + uint8_t pllgfxclkspreadenabled; + uint8_t pllgfxclkspreadpercent; + uint16_t pllgfxclkspreadfreq; uint8_t uclkspreadenabled; uint8_t uclkspreadpercent; @@ -1276,7 +1276,11 @@ struct atom_smc_dpm_info_v4_1 uint8_t socclkspreadpercent; uint16_t socclkspreadfreq; - uint32_t boardreserved[3]; + uint8_t acggfxclkspreadenabled; + uint8_t acggfxclkspreadpercent; + uint16_t acggfxclkspreadfreq; + + uint32_t boardreserved[10]; }; diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c index 55f9b30513ff..ad42caac033e 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c @@ -616,9 +616,9 @@ int pp_atomfwctrl_get_smc_dpm_information(struct pp_hwmgr *hwmgr, param->ledpin1 = info->ledpin1; param->ledpin2 = info->ledpin2; - param->gfxclkspreadenabled = info->gfxclkspreadenabled; - param->gfxclkspreadpercent = info->gfxclkspreadpercent; - param->gfxclkspreadfreq = info->gfxclkspreadfreq; + param->pllgfxclkspreadenabled = info->pllgfxclkspreadenabled; + param->pllgfxclkspreadpercent = info->pllgfxclkspreadpercent; + param->pllgfxclkspreadfreq = info->pllgfxclkspreadfreq; param->uclkspreadenabled = info->uclkspreadenabled; param->uclkspreadpercent = info->uclkspreadpercent; @@ -628,5 +628,9 @@ int pp_atomfwctrl_get_smc_dpm_information(struct pp_hwmgr *hwmgr, param->socclkspreadpercent = info->socclkspreadpercent; param->socclkspreadfreq = info->socclkspreadfreq; + param->acggfxclkspreadenabled = info->acggfxclkspreadenabled; + param->acggfxclkspreadpercent = info->acggfxclkspreadpercent; + param->acggfxclkspreadfreq = info->acggfxclkspreadfreq; + return 0; } diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h index a957d8f08029..8df1e84f27c9 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h @@ -192,9 +192,9 @@ struct pp_atomfwctrl_smc_dpm_parameters uint8_t ledpin1; uint8_t ledpin2; - uint8_t gfxclkspreadenabled; - uint8_t gfxclkspreadpercent; - uint16_t gfxclkspreadfreq; + uint8_t pllgfxclkspreadenabled; + uint8_t pllgfxclkspreadpercent; + uint16_t pllgfxclkspreadfreq; uint8_t uclkspreadenabled; uint8_t uclkspreadpercent; @@ -203,6 +203,10 @@ struct pp_atomfwctrl_smc_dpm_parameters uint8_t socclkspreadenabled; uint8_t socclkspreadpercent; uint16_t socclkspreadfreq; + + uint8_t acggfxclkspreadenabled; + uint8_t acggfxclkspreadpercent; + uint16_t acggfxclkspreadfreq; }; int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr, diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c index e7d794980b84..b34113f45904 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c @@ -208,9 +208,9 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable ppsmc_pptable->LedPin1 = smc_dpm_table.ledpin1; ppsmc_pptable->LedPin2 = smc_dpm_table.ledpin2; - ppsmc_pptable->GfxclkSpreadEnabled = smc_dpm_table.gfxclkspreadenabled; - ppsmc_pptable->GfxclkSpreadPercent = smc_dpm_table.gfxclkspreadpercent; - ppsmc_pptable->GfxclkSpreadFreq = smc_dpm_table.gfxclkspreadfreq; + ppsmc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table.pllgfxclkspreadenabled; + ppsmc_pptable->PllGfxclkSpreadPercent = smc_dpm_table.pllgfxclkspreadpercent; + ppsmc_pptable->PllGfxclkSpreadFreq = smc_dpm_table.pllgfxclkspreadfreq; ppsmc_pptable->UclkSpreadEnabled = 0; ppsmc_pptable->UclkSpreadPercent = smc_dpm_table.uclkspreadpercent; @@ -220,6 +220,11 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable ppsmc_pptable->SocclkSpreadPercent = smc_dpm_table.socclkspreadpercent; ppsmc_pptable->SocclkSpreadFreq = smc_dpm_table.socclkspreadfreq; + ppsmc_pptable->AcgGfxclkSpreadEnabled = smc_dpm_table.acggfxclkspreadenabled; + ppsmc_pptable->AcgGfxclkSpreadPercent = smc_dpm_table.acggfxclkspreadpercent; + ppsmc_pptable->AcgGfxclkSpreadFreq = smc_dpm_table.acggfxclkspreadfreq; + + return 0; } diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h index cd2e503a87da..fb696e3d06cf 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h +++ b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h @@ -127,7 +127,7 @@ #define FEATURE_GFX_EDC_MASK (1 << FEATURE_GFX_EDC_BIT ) #define FEATURE_GFXOFF_MASK (1 << FEATURE_GFXOFF_BIT ) #define FEATURE_CG_MASK (1 << FEATURE_CG_BIT ) -#define FEATURE_ACG_MASK (1 << FEATURE_ACG_BIT ) +#define FEATURE_ACG_MASK (1 << FEATURE_ACG_BIT) #define FEATURE_SPARE_29_MASK (1 << FEATURE_SPARE_29_BIT ) #define FEATURE_SPARE_30_MASK (1 << FEATURE_SPARE_30_BIT ) #define FEATURE_SPARE_31_MASK (1 << FEATURE_SPARE_31_BIT ) @@ -481,9 +481,9 @@ typedef struct { uint8_t padding8_4; - uint8_t GfxclkSpreadEnabled; - uint8_t GfxclkSpreadPercent; - uint16_t GfxclkSpreadFreq; + uint8_t PllGfxclkSpreadEnabled; + uint8_t PllGfxclkSpreadPercent; + uint16_t PllGfxclkSpreadFreq; uint8_t UclkSpreadEnabled; uint8_t UclkSpreadPercent; @@ -493,7 +493,11 @@ typedef struct { uint8_t SocclkSpreadPercent; uint16_t SocclkSpreadFreq; - uint32_t BoardReserved[3]; + uint8_t AcgGfxclkSpreadEnabled; + uint8_t AcgGfxclkSpreadPercent; + uint16_t AcgGfxclkSpreadFreq; + + uint32_t BoardReserved[10]; uint32_t MmHubPadding[7]; |