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author | Andrey Grodzovsky <andrey.grodzovsky@amd.com> | 2019-08-14 16:16:52 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-08-15 11:00:02 -0500 |
commit | d6c23e6f1374180dc1197a1d25323ec68bd1e04c (patch) | |
tree | 6668f23cabc8bdcfc53cbd4a6303b0a6b4bc95cd /drivers/gpu/drm/amd/powerplay | |
parent | e84fb7bca63761c42201da7783f8a3a3abd8287b (diff) | |
download | linux-d6c23e6f1374180dc1197a1d25323ec68bd1e04c.tar.bz2 |
drm/amd/powerplay: add mode2 reset callback for pp_smu_mgr
Also define reset modes (0, 1 and 2)
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index 07fd64aad2ae..abeff1570277 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h @@ -189,6 +189,14 @@ struct phm_vce_clock_voltage_dependency_table { struct phm_vce_clock_voltage_dependency_record entries[1]; }; + +enum SMU_ASIC_RESET_MODE +{ + SMU_ASIC_RESET_MODE_0, + SMU_ASIC_RESET_MODE_1, + SMU_ASIC_RESET_MODE_2, +}; + struct pp_smumgr_func { char *name; int (*smu_init)(struct pp_hwmgr *hwmgr); @@ -345,6 +353,7 @@ struct pp_hwmgr_func { int (*get_ppfeature_status)(struct pp_hwmgr *hwmgr, char *buf); int (*set_ppfeature_status)(struct pp_hwmgr *hwmgr, uint64_t ppfeature_masks); int (*set_mp1_state)(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state); + int (*asic_reset)(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode); }; struct pp_table_func { |