diff options
author | Prike Liang <Prike.Liang@amd.com> | 2019-09-18 15:11:34 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-03 09:11:04 -0500 |
commit | af1ec44f9a56354bac98d000cbac2c8fed1f2e87 (patch) | |
tree | 054b3ac0599e4b8da3e9e6a7968ef0e2e0fc98bd /drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | |
parent | 227f7d58d707fa6d931a1e16d29eb3e1c41ad67d (diff) | |
download | linux-af1ec44f9a56354bac98d000cbac2c8fed1f2e87.tar.bz2 |
drm/amd/powerplay: bypass dpm_context null pointer check guard for some smu series
For now APU has no smu_dpm_context structure for containing default/current related dpm tables,
thus will needn't initialize smu_dpm_context to aviod APU null pointer issue.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/amdgpu_smu.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index df510cb86da5..d9ef4ae4b8f6 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -1559,7 +1559,8 @@ static int smu_enable_umd_pstate(void *handle, struct smu_context *smu = (struct smu_context*)(handle); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); - if (!smu->pm_enabled || !smu_dpm_ctx->dpm_context) + + if (!smu->is_apu && (!smu->pm_enabled || !smu_dpm_ctx->dpm_context)) return -EINVAL; if (!(smu_dpm_ctx->dpm_level & profile_mode_mask)) { @@ -1757,7 +1758,7 @@ enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu) struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); enum amd_dpm_forced_level level; - if (!smu_dpm_ctx->dpm_context) + if (!smu->is_apu && !smu_dpm_ctx->dpm_context) return -EINVAL; mutex_lock(&(smu->mutex)); @@ -1772,7 +1773,7 @@ int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_lev struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); int ret = 0; - if (!smu_dpm_ctx->dpm_context) + if (!smu->is_apu && !smu_dpm_ctx->dpm_context) return -EINVAL; ret = smu_enable_umd_pstate(smu, &level); |