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author | Wesley Chalmers <Wesley.Chalmers@amd.com> | 2021-05-06 14:51:20 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2021-06-08 12:20:57 -0400 |
commit | b4d56e0c508b2ad847aeff5691f67bd2a40034ec (patch) | |
tree | b485b9c55eeebcad02dab49a6af88177f35f87c6 /drivers/gpu/drm/amd/display/dc/inc | |
parent | bd4fd2510e20241a2ddce192eda2c5c3980c3575 (diff) | |
download | linux-b4d56e0c508b2ad847aeff5691f67bd2a40034ec.tar.bz2 |
drm/amd/display: Add Interface to set FIFO ERRDET SW Override
[WHY]
HW has handed down a new sequence which requires access to the FIFO
ERRDET SW Override register.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h index f7aa703e3175..d3d7c338e491 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h @@ -76,6 +76,8 @@ struct dccg_funcs { void (*get_dccg_ref_freq)(struct dccg *dccg, unsigned int xtalin_freq_inKhz, unsigned int *dccg_ref_freq_inKhz); + void (*set_fifo_errdet_ovr_en)(struct dccg *dccg, + bool en); void (*dccg_init)(struct dccg *dccg); #if defined(CONFIG_DRM_AMD_DC_DCN3_1) |