diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2017-06-15 16:21:43 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 17:19:36 -0400 |
| commit | 8fa9ca2ec6919656db87391a1633692ee8d57c22 (patch) | |
| tree | cd25e156343f2da06963e46e7944aead77c60823 /drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h | |
| parent | 7fc6ff772b22cad6fc5fe06b0dfa3f730559faf4 (diff) | |
| download | linux-8fa9ca2ec6919656db87391a1633692ee8d57c22.tar.bz2 | |
drm/amd/display: Remove DCE12 guards
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h index c784c1b961c6..c2f4050fc6dc 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h @@ -187,7 +187,6 @@ #define SE_COMMON_MASK_SH_LIST_DCE_COMMON(mask_sh)\ SE_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh) -#if defined(CONFIG_DRM_AMD_DC_DCE12_0) #define SE_COMMON_MASK_SH_LIST_SOC_BASE(mask_sh)\ SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_INDEX, mask_sh),\ SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB0, mask_sh),\ @@ -267,7 +266,6 @@ SE_SF(DIG0_HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\ SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\ SE_SF(DIG0_DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh) -#endif #define SE_COMMON_MASK_SH_LIST_SOC(mask_sh)\ SE_COMMON_MASK_SH_LIST_SOC_BASE(mask_sh) @@ -294,7 +292,6 @@ SE_SF(DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh),\ SE_SF(DP_VID_TIMING, DP_VID_M_DOUBLE_VALUE_EN, mask_sh) -#if defined(CONFIG_DRM_AMD_DC_DCE12_0) #define SE_COMMON_MASK_SH_LIST_DCE120(mask_sh)\ SE_COMMON_MASK_SH_LIST_SOC(mask_sh),\ SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC0_UPDATE, mask_sh),\ @@ -307,7 +304,6 @@ SE_SF(DP0_DP_SEC_CNTL, DP_SEC_AVI_ENABLE, mask_sh),\ SE_SF(DIG0_AFMT_AVI_INFO3, AFMT_AVI_INFO_VERSION, mask_sh),\ SE_SF(DP0_DP_VID_TIMING, DP_VID_M_DOUBLE_VALUE_EN, mask_sh) -#endif struct dce_stream_encoder_shift { uint8_t AFMT_GENERIC_INDEX; |