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author | Christian König <christian.koenig@amd.com> | 2018-01-12 19:14:42 +0100 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-02-19 14:18:09 -0500 |
commit | 5518625d6a50c1724b2b2a796fc2fb1a8f1a9c21 (patch) | |
tree | 13ce65f4878081221fbaa1bf1a5fff58cba7bb4b /drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | |
parent | d9a701ccd6dafc30f48ad8c1b7d8ab4477547707 (diff) | |
download | linux-5518625d6a50c1724b2b2a796fc2fb1a8f1a9c21.tar.bz2 |
drm/amdgpu: implement gmc_v8_0_emit_flush_gpu_tlb
Unify tlb flushing for gmc v8.
v2: handle UVD v6 as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 21 |
1 files changed, 1 insertions, 20 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c index 0446fe2c67e1..5f499e663e2a 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c @@ -1087,26 +1087,7 @@ static void uvd_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, unsigned pasid, uint64_t pd_addr) { - uint32_t reg; - - if (vmid < 8) - reg = mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vmid; - else - reg = mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8; - - amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0)); - amdgpu_ring_write(ring, reg << 2); - amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0)); - amdgpu_ring_write(ring, pd_addr >> 12); - amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); - amdgpu_ring_write(ring, 0x8); - - amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0)); - amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2); - amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0)); - amdgpu_ring_write(ring, 1 << vmid); - amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); - amdgpu_ring_write(ring, 0x8); + amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pasid, pd_addr); amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0)); amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2); |