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author | Aditya Swarup <aditya.swarup@intel.com> | 2019-03-06 18:14:12 -0800 |
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committer | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2019-03-11 10:56:47 +0100 |
commit | 26eeea1506838c77524fa90c8e6f1cc246762a4a (patch) | |
tree | 223e8c7b0dac210b8377cdfcd518635a2d6db5c7 /drivers/gpu/drm/amd/amdgpu/si.c | |
parent | f4ecb8ae70de86710e85138ce49af5c689951953 (diff) | |
download | linux-26eeea1506838c77524fa90c8e6f1cc246762a4a.tar.bz2 |
drm/i915/icl: Fix CRC mismatch error for DP link layer compliance
Setting the pixel rounding bit to 1 in PIPE_CHICKEN register allows
to passthrough FB pixels unmodified across pipe. This fixes the failures
for DP link layer compliance tests 4.4.1.1, 4.4.1.2 & 4.4.1.3.
(Lineage #1605353570)
v2: This is also needed to fix failing IGT test case kms_cursor_crc on
ICL.(Mika Kahola)
Make macros consistent with i915_reg.h comments.(Jani Nikula)
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190307021412.18626-1-aditya.swarup@intel.com
References: https://bugs.freedesktop.org/show_bug.cgi?id=103232
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/si.c')
0 files changed, 0 insertions, 0 deletions