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authorRex Zhu <Rex.Zhu@amd.com>2018-01-25 18:42:08 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-02-19 14:19:07 -0500
commit61e208b16e93747df49ed47fc66443d9d68e996e (patch)
treefb675dd68793ce7ead87cd0f381ac7c96f264f98 /drivers/gpu/drm/amd/amdgpu/ci_dpm.c
parent337ecd6a98297493abe826203e553cad6bdfc309 (diff)
downloadlinux-61e208b16e93747df49ed47fc66443d9d68e996e.tar.bz2
drm/amd/pp: Fix sysfs pp_dpm_pcie bug on CI/VI
when echo "01">pp_dpm_pcie the pcie dpm will fix in highest link speed. But user should expect auto speed between level 0 and level1 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/ci_dpm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/ci_dpm.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 5f61e7000a00..f82f40fb3bea 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -6642,6 +6642,9 @@ static int ci_dpm_force_clock_level(void *handle,
if (adev->pm.dpm.forced_level != AMD_DPM_FORCED_LEVEL_MANUAL)
return -EINVAL;
+ if (mask == 0)
+ return -EINVAL;
+
switch (type) {
case PP_SCLK:
if (!pi->sclk_dpm_key_disabled)
@@ -6660,15 +6663,15 @@ static int ci_dpm_force_clock_level(void *handle,
case PP_PCIE:
{
uint32_t tmp = mask & pi->dpm_level_enable_mask.pcie_dpm_enable_mask;
- uint32_t level = 0;
- while (tmp >>= 1)
- level++;
-
- if (!pi->pcie_dpm_key_disabled)
- amdgpu_ci_send_msg_to_smc_with_parameter(adev,
+ if (!pi->pcie_dpm_key_disabled) {
+ if (fls(tmp) != ffs(tmp))
+ amdgpu_ci_send_msg_to_smc(adev, PPSMC_MSG_PCIeDPM_UnForceLevel);
+ else
+ amdgpu_ci_send_msg_to_smc_with_parameter(adev,
PPSMC_MSG_PCIeDPM_ForceLevel,
- level);
+ fls(tmp) - 1);
+ }
break;
}
default: