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| author | Dave Airlie <airlied@redhat.com> | 2022-02-21 09:43:02 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2022-02-21 09:43:03 +1000 |
| commit | 0a131b69c141638c1be85c4539c1513426abb2b2 (patch) | |
| tree | 14cc0d1eee5b7b3123ae80f55a100c4b3f2322c2 /drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | |
| parent | b9c7babe2c2e37a50aa42401b38d597ea78f506e (diff) | |
| parent | b63c54d978236dd6014cf2ffba96d626e97c915c (diff) | |
| download | linux-0a131b69c141638c1be85c4539c1513426abb2b2.tar.bz2 | |
Merge tag 'amd-drm-next-5.18-2022-02-18' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.18-2022-02-18:
amdgpu:
- kerneldoc fixes
- Expose IP discovery data via sysfs
- RAS rework
- SRIOV fixes
- Display FP fix
- RDNA2 SMU fixes
- Display DSC fixes
- Cyan Skillfish update
- GC 10.3.7 updates
- SDMA 5.2.7 updates
- DCN 3.1.6 updates
- Fix ASPM handling
- GC 10.3.6 updates
amdkfd:
- SPDX header cleanups
- SDMA queue handling fixes
- Misc fixes
radeon:
- iMac backlight fix
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218180920.5754-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index e1288901beb6..5656bf7d9267 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c @@ -836,7 +836,7 @@ static bool amdgpu_virt_get_rlcg_reg_access_flag(struct amdgpu_device *adev, /* only in new version, AMDGPU_REGS_NO_KIQ and * AMDGPU_REGS_RLC are enabled simultaneously */ } else if ((acc_flags & AMDGPU_REGS_RLC) && - !(acc_flags & AMDGPU_REGS_NO_KIQ)) { + !(acc_flags & AMDGPU_REGS_NO_KIQ) && write) { *rlcg_flag = AMDGPU_RLCG_GC_WRITE_LEGACY; ret = true; } @@ -902,7 +902,7 @@ static u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v for (i = 0; i < timeout; i++) { tmp = readl(scratch_reg1); - if (!(tmp & flag)) + if (!(tmp & AMDGPU_RLCG_SCRATCH1_ADDRESS_MASK)) break; udelay(10); } @@ -940,7 +940,7 @@ void amdgpu_sriov_wreg(struct amdgpu_device *adev, u32 rlcg_flag; if (!amdgpu_sriov_runtime(adev) && - amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, true, &rlcg_flag)) { + amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, true, &rlcg_flag)) { amdgpu_virt_rlcg_reg_rw(adev, offset, value, rlcg_flag); return; } @@ -957,7 +957,7 @@ u32 amdgpu_sriov_rreg(struct amdgpu_device *adev, u32 rlcg_flag; if (!amdgpu_sriov_runtime(adev) && - amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag)) + amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag)) return amdgpu_virt_rlcg_reg_rw(adev, offset, 0, rlcg_flag); if (acc_flags & AMDGPU_REGS_NO_KIQ) |