summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
diff options
context:
space:
mode:
authorAlex Deucher <alexander.deucher@amd.com>2018-07-25 15:11:34 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-07-27 09:07:44 -0500
commitf1e582ebfd703ea01dc4caf4d339b7c84ec3ff29 (patch)
tree56bfd3cd4840cf6dee41cbbf77d468823065872b /drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
parentd04cc604a66b07eff8fce824fb6c0fdc0875d2e3 (diff)
downloadlinux-f1e582ebfd703ea01dc4caf4d339b7c84ec3ff29.tar.bz2
drm/amdgpu: implement harvesting support for UVD 7.2 (v3)
Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index c7dce14fd47d..dd2132fa2b89 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -286,7 +286,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
struct drm_crtc *crtc;
uint32_t ui32 = 0;
uint64_t ui64 = 0;
- int i, found;
+ int i, j, found;
int ui32_size = sizeof(ui32);
if (!info->return_size || !info->return_pointer)
@@ -348,7 +348,11 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
break;
case AMDGPU_HW_IP_UVD:
type = AMD_IP_BLOCK_TYPE_UVD;
- ring_mask |= adev->uvd.inst[0].ring.ready;
+ for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
+ if (adev->uvd.harvest_config & (1 << i))
+ continue;
+ ring_mask |= adev->uvd.inst[i].ring.ready;
+ }
ib_start_alignment = 64;
ib_size_alignment = 64;
break;
@@ -361,9 +365,12 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
break;
case AMDGPU_HW_IP_UVD_ENC:
type = AMD_IP_BLOCK_TYPE_UVD;
- for (i = 0; i < adev->uvd.num_enc_rings; i++)
- ring_mask |=
- adev->uvd.inst[0].ring_enc[i].ready << i;
+ for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
+ if (adev->uvd.harvest_config & (1 << i))
+ continue;
+ for (j = 0; j < adev->uvd.num_enc_rings; j++)
+ ring_mask |= adev->uvd.inst[i].ring_enc[j].ready << j;
+ }
ib_start_alignment = 64;
ib_size_alignment = 64;
break;