diff options
author | Chunming Zhou <david1.zhou@amd.com> | 2015-07-21 13:17:19 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-08-17 16:50:32 -0400 |
commit | 9cb7e5a91f6cd4dc018cca7120d2da067f816d3a (patch) | |
tree | 6d221842a748e103ad700841d94f7064a65c87d0 /drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | |
parent | b80d8475c1fdf5f4bcabb65168b2e8a9c3d77731 (diff) | |
download | linux-9cb7e5a91f6cd4dc018cca7120d2da067f816d3a.tar.bz2 |
drm/amdgpu: add context entity init
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 36 |
1 files changed, 35 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 144edc97c6fe..557fb60f416b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -28,13 +28,23 @@ static void amdgpu_ctx_do_release(struct kref *ref) { struct amdgpu_ctx *ctx; + struct amdgpu_device *adev; unsigned i, j; ctx = container_of(ref, struct amdgpu_ctx, refcount); + adev = ctx->adev; + for (i = 0; i < AMDGPU_MAX_RINGS; ++i) for (j = 0; j < AMDGPU_CTX_MAX_CS_PENDING; ++j) fence_put(ctx->rings[i].fences[j]); + + if (amdgpu_enable_scheduler) { + for (i = 0; i < adev->num_rings; i++) + amd_context_entity_fini(adev->rings[i]->scheduler, + &ctx->rings[i].c_entity); + } + kfree(ctx); } @@ -43,7 +53,7 @@ int amdgpu_ctx_alloc(struct amdgpu_device *adev, struct amdgpu_fpriv *fpriv, { struct amdgpu_ctx *ctx; struct amdgpu_ctx_mgr *mgr = &fpriv->ctx_mgr; - int i, r; + int i, j, r; ctx = kmalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -59,11 +69,35 @@ int amdgpu_ctx_alloc(struct amdgpu_device *adev, struct amdgpu_fpriv *fpriv, *id = (uint32_t)r; memset(ctx, 0, sizeof(*ctx)); + ctx->adev = adev; kref_init(&ctx->refcount); spin_lock_init(&ctx->ring_lock); for (i = 0; i < AMDGPU_MAX_RINGS; ++i) ctx->rings[i].sequence = 1; mutex_unlock(&mgr->lock); + if (amdgpu_enable_scheduler) { + /* create context entity for each ring */ + for (i = 0; i < adev->num_rings; i++) { + struct amd_run_queue *rq; + if (fpriv) + rq = &adev->rings[i]->scheduler->sched_rq; + else + rq = &adev->rings[i]->scheduler->kernel_rq; + r = amd_context_entity_init(adev->rings[i]->scheduler, + &ctx->rings[i].c_entity, + NULL, rq, *id); + if (r) + break; + } + + if (i < adev->num_rings) { + for (j = 0; j < i; j++) + amd_context_entity_fini(adev->rings[j]->scheduler, + &ctx->rings[j].c_entity); + kfree(ctx); + return -EINVAL; + } + } return 0; } |