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authorThierry Reding <treding@nvidia.com>2017-11-07 19:15:58 +0100
committerLinus Walleij <linus.walleij@linaro.org>2017-11-08 14:17:12 +0100
commit8302cf585288f75fd253f6b9a094d51ae371a3f3 (patch)
treecacc2410c43290426bfe27da4d721e52282994ac /drivers/gpio
parent60ed54cae8dc0f2d41cafbd477bbed6deb716615 (diff)
downloadlinux-8302cf585288f75fd253f6b9a094d51ae371a3f3.tar.bz2
gpio: Introduce struct gpio_irq_chip.first
Some GPIO chips cannot support sparse IRQ numbering and therefore need to manually allocate their interrupt descriptors statically. For these cases, a driver can pass the first allocated IRQ via the struct gpio_irq_chip's "first" field and thereby cause the IRQ domain to map all IRQs during initialization. Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpiolib.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 389257f97e45..6d5c366a1378 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1778,7 +1778,8 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)
ops = &gpiochip_domain_ops;
gpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,
- 0, ops, gpiochip);
+ gpiochip->irq.first,
+ ops, gpiochip);
if (!gpiochip->irq.domain)
return -EINVAL;