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authorArnd Bergmann <arnd@arndb.de>2013-04-09 16:32:20 +0200
committerArnd Bergmann <arnd@arndb.de>2013-04-09 16:32:20 +0200
commit6cd2f8e7da502272248f4bdefcb952a68318e02b (patch)
tree849530c371ea05bbdc516c553cbe95da88e2b663 /drivers/gpio
parent3be1812ea3b7193ee1a3993cadf9a7985121cf16 (diff)
parent38be85de698ef3f2755ee0eabf520530757860aa (diff)
downloadlinux-6cd2f8e7da502272248f4bdefcb952a68318e02b.tar.bz2
Merge tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>: ARM: tegra: core SoC support development This branch includes major development on the core Tegra SoC support code in the mach-tegra directory: * SMP support for Tegra114. * Exposes SoC chip ID and revision through standard sysfs files. * System-level suspend/resume for Tegra20/30. At present, this only supports "LP2" mode (CPU power-down), but provides the basis to implement "LP0"/"LP1" (various levels of core/chip power-down) in the hopefully near future. * A minor cleanup of a duplicate include, which was introduced in this branch. This branch is based on the previous cleanup pull request. * tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: pm: remove duplicated include from pm.c ARM: tegra: cpuidle: remove redundant parameters for powered-down mode ARM: tegra: pm: add platform suspend support ARM: dt: tegra: add bindings of power management configurations for PMC ARM: tegra: irq: add wake up handling gpio: tegra: add gpio wakeup source handling ARM: tegra: moving the CPU power timer function to PMC driver ARM: tegra: add clock source of PMC to device trees ARM: tegra: add speedo-based process id for Tegra114 ARM: tegra: expose chip ID and revision ARM: tegra: bring up secondary CPU for Tegra114 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-tegra.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 414ad912232f..e3956359202c 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -72,6 +72,7 @@ struct tegra_gpio_bank {
u32 oe[4];
u32 int_enb[4];
u32 int_lvl[4];
+ u32 wake_enb[4];
#endif
};
@@ -333,15 +334,31 @@ static int tegra_gpio_suspend(struct device *dev)
bank->oe[p] = tegra_gpio_readl(GPIO_OE(gpio));
bank->int_enb[p] = tegra_gpio_readl(GPIO_INT_ENB(gpio));
bank->int_lvl[p] = tegra_gpio_readl(GPIO_INT_LVL(gpio));
+
+ /* Enable gpio irq for wake up source */
+ tegra_gpio_writel(bank->wake_enb[p],
+ GPIO_INT_ENB(gpio));
}
}
local_irq_restore(flags);
return 0;
}
-static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable)
+static int tegra_gpio_irq_set_wake(struct irq_data *d, unsigned int enable)
{
struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
+ int gpio = d->hwirq;
+ u32 port, bit, mask;
+
+ port = GPIO_PORT(gpio);
+ bit = GPIO_BIT(gpio);
+ mask = BIT(bit);
+
+ if (enable)
+ bank->wake_enb[port] |= mask;
+ else
+ bank->wake_enb[port] &= ~mask;
+
return irq_set_irq_wake(bank->irq, enable);
}
#endif
@@ -353,7 +370,7 @@ static struct irq_chip tegra_gpio_irq_chip = {
.irq_unmask = tegra_gpio_irq_unmask,
.irq_set_type = tegra_gpio_irq_set_type,
#ifdef CONFIG_PM_SLEEP
- .irq_set_wake = tegra_gpio_wake_enable,
+ .irq_set_wake = tegra_gpio_irq_set_wake,
#endif
};