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authorStephen Boyd <sboyd@codeaurora.org>2018-03-23 09:34:52 -0700
committerLinus Walleij <linus.walleij@linaro.org>2018-03-27 15:34:20 +0200
commit726cb3ba49692bdae6caff457755e7cdb432efa4 (patch)
tree66bf4de79b830df2556fa8854dcba1d414ebd9a4 /drivers/gpio/gpiolib-of.c
parentace56935ff48879239d79129c7882ea2ff1b4804 (diff)
downloadlinux-726cb3ba49692bdae6caff457755e7cdb432efa4.tar.bz2
gpiolib: Support 'gpio-reserved-ranges' property
Some qcom platforms make some GPIOs or pins unavailable for use by non-secure operating systems, and thus reading or writing the registers for those pins will cause access control issues. Add support for a DT property to describe the set of GPIOs that are available for use so that higher level OSes are able to know what pins to avoid reading/writing. Non-DT platforms can add support by directly updating the chip->valid_mask. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpiolib-of.c')
-rw-r--r--drivers/gpio/gpiolib-of.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 84e5a9df2344..ed81d9a6316f 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -511,6 +511,28 @@ void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc)
}
EXPORT_SYMBOL(of_mm_gpiochip_remove);
+static void of_gpiochip_init_valid_mask(struct gpio_chip *chip)
+{
+ int len, i;
+ u32 start, count;
+ struct device_node *np = chip->of_node;
+
+ len = of_property_count_u32_elems(np, "gpio-reserved-ranges");
+ if (len < 0 || len % 2 != 0)
+ return;
+
+ for (i = 0; i < len; i += 2) {
+ of_property_read_u32_index(np, "gpio-reserved-ranges",
+ i, &start);
+ of_property_read_u32_index(np, "gpio-reserved-ranges",
+ i + 1, &count);
+ if (start >= chip->ngpio || start + count >= chip->ngpio)
+ continue;
+
+ bitmap_clear(chip->valid_mask, start, count);
+ }
+};
+
#ifdef CONFIG_PINCTRL
static int of_gpiochip_add_pin_range(struct gpio_chip *chip)
{
@@ -615,6 +637,8 @@ int of_gpiochip_add(struct gpio_chip *chip)
if (chip->of_gpio_n_cells > MAX_PHANDLE_ARGS)
return -EINVAL;
+ of_gpiochip_init_valid_mask(chip);
+
status = of_gpiochip_add_pin_range(chip);
if (status)
return status;