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authorClemens Ladisch <clemens@ladisch.de>2011-04-11 09:56:12 +0200
committerStefan Richter <stefanr@s5r6.in-berlin.de>2011-04-19 20:00:10 +0200
commitecf8328e59447b83a1f79628487e0e9f8801db84 (patch)
tree20ea90d6a38687a48c28ad185c612d0dece86e6f /drivers/firewire
parent115881d395959b75c8c3bb94913f2ce869b8aa7a (diff)
downloadlinux-ecf8328e59447b83a1f79628487e0e9f8801db84.tar.bz2
firewire: ohci: do not start DMA contexts before link is enabled
OHCI 1.1 5.7.3 not only forbids enabling or starting any DMA contexts before the linkEnable bit is set, but also explicitly warns of undefined behaviour if this order is violated. Don't violate it then. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
-rw-r--r--drivers/firewire/ohci.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index f903d7b6f34a..dfb3cb774a79 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -2066,8 +2066,6 @@ static int ohci_enable(struct fw_card *card,
reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus);
reg_write(ohci, OHCI1394_LinkControlSet,
- OHCI1394_LinkControl_rcvSelfID |
- OHCI1394_LinkControl_rcvPhyPkt |
OHCI1394_LinkControl_cycleTimerEnable |
OHCI1394_LinkControl_cycleMaster);
@@ -2094,9 +2092,6 @@ static int ohci_enable(struct fw_card *card,
reg_write(ohci, OHCI1394_FairnessControl, 0);
card->priority_budget_implemented = ohci->pri_req_max != 0;
- ar_context_run(&ohci->ar_request_ctx);
- ar_context_run(&ohci->ar_response_ctx);
-
reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000);
reg_write(ohci, OHCI1394_IntEventClear, ~0);
reg_write(ohci, OHCI1394_IntMaskClear, ~0);
@@ -2186,7 +2181,13 @@ static int ohci_enable(struct fw_card *card,
reg_write(ohci, OHCI1394_HCControlSet,
OHCI1394_HCControl_linkEnable |
OHCI1394_HCControl_BIBimageValid);
- flush_writes(ohci);
+
+ reg_write(ohci, OHCI1394_LinkControlSet,
+ OHCI1394_LinkControl_rcvSelfID |
+ OHCI1394_LinkControl_rcvPhyPkt);
+
+ ar_context_run(&ohci->ar_request_ctx);
+ ar_context_run(&ohci->ar_response_ctx); /* also flushes writes */
/* We are ready to go, reset bus to finish initialization. */
fw_schedule_bus_reset(&ohci->card, false, true);