summaryrefslogtreecommitdiffstats
path: root/drivers/eisa
diff options
context:
space:
mode:
authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-10-28 01:29:34 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-10-28 01:29:34 +0100
commit93658cb8597ab76655220be43d3d7f74c66e9e4e (patch)
treee6da56aac9cda2c80315cc73ee31ef4c47af8472 /drivers/eisa
parent6e0ca95aa3c83c47d13f9f400bfaaa853d0b224b (diff)
parentad7722dab7292dbc1c4586d701ac226b68122d39 (diff)
downloadlinux-93658cb8597ab76655220be43d3d7f74c66e9e4e.tar.bz2
Merge branch 'pm-cpufreq'
* pm-cpufreq: (167 commits) cpufreq: create per policy rwsem instead of per CPU cpu_policy_rwsem intel_pstate: Add Baytrail support intel_pstate: Refactor driver to support CPUs with different MSR layouts cpufreq: Implement light weight ->target_index() routine PM / OPP: rename header to linux/pm_opp.h PM / OPP: rename data structures to dev_pm equivalents PM / OPP: rename functions to dev_pm_opp* cpufreq / governor: Remove fossil comment cpufreq: exynos4210: Use the common clock framework to set APLL clock rate cpufreq: exynos4x12: Use the common clock framework to set APLL clock rate cpufreq: Detect spurious invocations of update_policy_cpu() cpufreq: pmac64: enable cpufreq on iMac G5 (iSight) model cpufreq: pmac64: provide cpufreq transition latency for older G5 models cpufreq: pmac64: speed up frequency switch cpufreq: highbank-cpufreq: Enable Midway/ECX-2000 exynos-cpufreq: fix false return check from "regulator_set_voltage" speedstep-centrino: Remove unnecessary braces acpi-cpufreq: Add comment under ACPI_ADR_SPACE_SYSTEM_IO case cpufreq: arm-big-little: use clk_get instead of clk_get_sys cpufreq: exynos: Show a list of available frequencies ... Conflicts: drivers/devfreq/exynos/exynos5_bus.c
Diffstat (limited to 'drivers/eisa')
0 files changed, 0 insertions, 0 deletions