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authorHubert Chrzaniuk <hubert.chrzaniuk@intel.com>2016-03-07 15:30:45 +0100
committerBorislav Petkov <bp@suse.de>2016-03-07 19:07:40 +0100
commit83bdaad4d919722744ef1b726a9913ec36c6a430 (patch)
tree191e0aebe0d0f4c57a61290f47262c78d97322da /drivers/edac
parentf6cede5b49e822ebc41a099fe41ab4989f64e2cb (diff)
downloadlinux-83bdaad4d919722744ef1b726a9913ec36c6a430.tar.bz2
EDAC, sb_edac: Fix logic when computing DIMM sizes on Xeon Phi
Correct a typo introduced by d0cdf9003140 ("EDAC, sb_edac: Add Knights Landing (Xeon Phi gen 2) support") As a result under some configurations DIMMs were not correctly recognized. Problem affects only Xeon Phi architecture. Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> Acked-by: Aristeu Rozanski <aris@redhat.com> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: lukasz.anaczkowski@intel.com Link: http://lkml.kernel.org/r/1457361045-26221-1-git-send-email-hubert.chrzaniuk@intel.com Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/sb_edac.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index e438ee5b433f..f5c6b97c8958 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -1574,7 +1574,7 @@ static int knl_get_dimm_capacity(struct sbridge_pvt *pvt, u64 *mc_sizes)
for (cha = 0; cha < KNL_MAX_CHAS; cha++) {
if (knl_get_mc_route(target,
mc_route_reg[cha]) == channel
- && participants[channel]) {
+ && !participants[channel]) {
participant_count++;
participants[channel] = 1;
break;