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authorBorislav Petkov <bp@suse.de>2020-06-18 20:25:25 +0200
committerBorislav Petkov <bp@suse.de>2020-06-18 20:25:25 +0200
commitee470bb25d0dcdf126f586ec0ae6dca66cb340a4 (patch)
tree99b01a3499f40e15417eddeed536a31b0a830c18 /drivers/edac
parentb3a9e3b9622ae10064826dccb4f7a52bd88c7407 (diff)
downloadlinux-ee470bb25d0dcdf126f586ec0ae6dca66cb340a4.tar.bz2
EDAC/amd64: Read back the scrub rate PCI register on F15h
Commit: da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h") added support for F15h, model 0x60 CPUs but in doing so, missed to read back SCRCTRL PCI config register on F15h CPUs which are *not* model 0x60. Add that read so that doing $ cat /sys/devices/system/edac/mc/mc0/sdram_scrub_rate can show the previously set DRAM scrub rate. Fixes: da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h") Reported-by: Anders Andersson <pipatron@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> #v4.4.. Link: https://lkml.kernel.org/r/CAKkunMbNWppx_i6xSdDHLseA2QQmGJqj_crY=NF-GZML5np4Vw@mail.gmail.com
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/amd64_edac.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index ef90070a9194..6262f6370c5d 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -269,6 +269,8 @@ static int get_scrub_rate(struct mem_ctl_info *mci)
if (pvt->model == 0x60)
amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval);
+ else
+ amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
} else {
amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
}