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authorBorislav Petkov <borislav.petkov@amd.com>2010-03-15 19:39:18 +0100
committerBorislav Petkov <borislav.petkov@amd.com>2010-08-03 16:14:01 +0200
commit695426506ebba6acc87843cca075595a775e8866 (patch)
tree4b6eba976a01ecc55c6c8d88d6ad8164d8bf769e /drivers/edac
parent935ab88e341ccb1507b2b0b1f1e9adcbbd693265 (diff)
downloadlinux-695426506ebba6acc87843cca075595a775e8866.tar.bz2
amd64_edac: Remove unneeded defines
All F2x110-related bit defines are used at only one place so replace them with simple BIT() macros. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Acked-by: Doug Thompson <dougthompson@xmission.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/amd64_edac.h43
1 files changed, 8 insertions, 35 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 707745b36733..613b9381e71a 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -244,44 +244,17 @@
#define F10_DCTL_SEL_LOW 0x110
-
-#define dct_sel_baseaddr(pvt) \
- ((pvt->dram_ctl_select_low) & 0xFFFFF800)
-
-#define dct_sel_interleave_addr(pvt) \
- (((pvt->dram_ctl_select_low) >> 6) & 0x3)
-
-enum {
- F10_DCTL_SEL_LOW_DctSelHiRngEn = BIT(0),
- F10_DCTL_SEL_LOW_DctSelIntLvEn = BIT(2),
- F10_DCTL_SEL_LOW_DctGangEn = BIT(4),
- F10_DCTL_SEL_LOW_DctDatIntLv = BIT(5),
- F10_DCTL_SEL_LOW_DramEnable = BIT(8),
- F10_DCTL_SEL_LOW_MemCleared = BIT(10),
-};
-
-#define dct_high_range_enabled(pvt) \
- (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelHiRngEn)
-
-#define dct_interleave_enabled(pvt) \
- (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelIntLvEn)
-
-#define dct_ganging_enabled(pvt) \
- (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctGangEn)
-
-#define dct_data_intlv_enabled(pvt) \
- (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctDatIntLv)
-
-#define dct_dram_enabled(pvt) \
- (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DramEnable)
-
-#define dct_memory_cleared(pvt) \
- (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_MemCleared)
-
+#define dct_sel_baseaddr(pvt) ((pvt->dram_ctl_select_low) & 0xFFFFF800)
+#define dct_sel_interleave_addr(pvt) (((pvt->dram_ctl_select_low) >> 6) & 0x3)
+#define dct_high_range_enabled(pvt) (pvt->dram_ctl_select_low & BIT(0))
+#define dct_interleave_enabled(pvt) (pvt->dram_ctl_select_low & BIT(2))
+#define dct_ganging_enabled(pvt) (pvt->dram_ctl_select_low & BIT(4))
+#define dct_data_intlv_enabled(pvt) (pvt->dram_ctl_select_low & BIT(5))
+#define dct_dram_enabled(pvt) (pvt->dram_ctl_select_low & BIT(8))
+#define dct_memory_cleared(pvt) (pvt->dram_ctl_select_low & BIT(10))
#define F10_DCTL_SEL_HIGH 0x114
-
/*
* Function 3 - Misc Control
*/