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authorSerge Semin <Sergey.Semin@baikalelectronics.ru>2020-07-23 03:58:45 +0300
committerVinod Koul <vkoul@kernel.org>2020-07-27 14:30:55 +0530
commite6fe5767961dbdcabbdfcc570993a91eebca4586 (patch)
treea2ce7eeebac2760f463ba3dbd7cbced18dfe4ff3 /drivers/dma
parentef3e515a87df2881db66f05b576804ca6f03e1ff (diff)
downloadlinux-e6fe5767961dbdcabbdfcc570993a91eebca4586.tar.bz2
dmaengine: dw: Set DMA device max segment size parameter
Maximum block size DW DMAC configuration corresponds to the max segment size DMA parameter in the DMA core subsystem notation. Lets set it with a value specific to the probed DW DMA controller. It shall help the DMA clients to create size-optimized SG-list items for the controller. This in turn will cause less dw_desc allocations, less LLP reinitializations, better DMA device performance. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-8-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/dw/core.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 33e99d95b3d3..fb95920c429e 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1229,6 +1229,13 @@ int do_dma_probe(struct dw_dma_chip *chip)
BIT(DMA_MEM_TO_MEM);
dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
+ /*
+ * For now there is no hardware with non uniform maximum block size
+ * across all of the device channels, so we set the maximum segment
+ * size as the block size found for the very first channel.
+ */
+ dma_set_max_seg_size(dw->dma.dev, dw->chan[0].block_size);
+
err = dma_async_device_register(&dw->dma);
if (err)
goto err_dma_register;