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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2015-07-08 16:28:16 +0200
committerVinod Koul <vinod.koul@intel.com>2015-08-19 22:31:53 +0530
commit6d8f7abd235c1a38629cdada49cc53992f4ad42e (patch)
tree68b85daa1cc0640517525c1922e84e3081e068a8 /drivers/dma/mv_xor.c
parent31495d60a06524f37a9ea66d7d62ce0418ef3506 (diff)
downloadlinux-6d8f7abd235c1a38629cdada49cc53992f4ad42e.tar.bz2
dmaengine: mv_xor: remove support for dmacap,* DT properties
The only reason why we had dmacap,* properties is because back when DMA_MEMSET was supported, only one out of the two channels per engine could do a memset operation. But this is something that the driver already knows anyway, and since then, the DMA_MEMSET support has been removed. The driver is already well aware of what each channel supports and the one to one mapping between Linux specific implementation details (such as dmacap,interrupt enabling DMA_INTERRUPT) and DT properties is a good indication that these DT properties are wrong. Therefore, this commit simply gets rid of these dmacap,* properties, they are now ignored, and the driver is responsible for knowing the capabilities of the hardware with regard to the dmaengine subsystem expectations. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/mv_xor.c')
-rw-r--r--drivers/dma/mv_xor.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index fbaf1ead2597..b165e0b31a48 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1190,12 +1190,9 @@ static int mv_xor_probe(struct platform_device *pdev)
op_in_desc = (int)of_id->data;
dma_cap_zero(cap_mask);
- if (of_property_read_bool(np, "dmacap,memcpy"))
- dma_cap_set(DMA_MEMCPY, cap_mask);
- if (of_property_read_bool(np, "dmacap,xor"))
- dma_cap_set(DMA_XOR, cap_mask);
- if (of_property_read_bool(np, "dmacap,interrupt"))
- dma_cap_set(DMA_INTERRUPT, cap_mask);
+ dma_cap_set(DMA_MEMCPY, cap_mask);
+ dma_cap_set(DMA_XOR, cap_mask);
+ dma_cap_set(DMA_INTERRUPT, cap_mask);
irq = irq_of_parse_and_map(np, 0);
if (!irq) {