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author | Dan Williams <dan.j.williams@intel.com> | 2021-06-15 14:00:40 -0700 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2022-07-26 12:23:01 -0700 |
commit | 8d48817df6ac2049955b6b3a4f1b68dbe5b31f1b (patch) | |
tree | be842cf5e695b50fc7fd6fa3e774fbebc97a2beb /drivers/cxl/cxl.h | |
parent | 176baefb2eb5d7a3ddebe3ff803db1fce44574b5 (diff) | |
download | linux-8d48817df6ac2049955b6b3a4f1b68dbe5b31f1b.tar.bz2 |
cxl/region: Add region driver boiler plate
The CXL region driver is responsible for routing fully formed CXL
regions to one of libnvdimm, for persistent memory regions, device-dax
for volatile memory regions, or just act as an enumeration placeholder
if the region was setup and configuration locked by platform firmware.
In the platform-firmware-setup case the expectation is that region is
already accounted in the system memory map, i.e. already enabled as
"System RAM".
For now, just attach to CXL regions in the CXL_CONFIG_COMMIT state, and
take no further action.
Given this driver is just a small / simple router, include it in the
core rather than its own module.
Co-developed-by: Ben Widawsky <bwidawsk@kernel.org>
Signed-off-by: Ben Widawsky <bwidawsk@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20220624041950.559155-18-dan.j.williams@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/cxl.h')
-rw-r--r-- | drivers/cxl/cxl.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 01095d78784d..e96bf8ccccf2 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -599,6 +599,7 @@ void cxl_driver_unregister(struct cxl_driver *cxl_drv); #define CXL_DEVICE_PORT 3 #define CXL_DEVICE_ROOT 4 #define CXL_DEVICE_MEMORY_EXPANDER 5 +#define CXL_DEVICE_REGION 6 #define MODULE_ALIAS_CXL(type) MODULE_ALIAS("cxl:t" __stringify(type) "*") #define CXL_MODALIAS_FMT "cxl:t%d" |