diff options
author | Vakul Garg <vakul.garg@nxp.com> | 2019-07-18 11:29:16 +0000 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2019-07-27 21:08:33 +1000 |
commit | 6ed01097f4378199614fe625495657af7c601cea (patch) | |
tree | 31baedf0e6c90b345ce54f887ff6d6e7b29fb40b /drivers/crypto | |
parent | f2f1d75ab725106c4958bda30f87bd39a0e3040a (diff) | |
download | linux-6ed01097f4378199614fe625495657af7c601cea.tar.bz2 |
crypto: caam/qi2 - Increase napi budget to process more caam responses
While running ipsec processing for traffic through multiple network
interfaces, it is observed that caam driver gets less time to poll
responses from caam block compared to ethernet driver. This is because
ethernet driver has as many napi instances per cpu as the number of
ethernet interfaces in system. Therefore, caam driver's napi executes
lesser than the ethernet driver's napi instances. This results in
situation that we end up submitting more requests to caam (which it is
able to finish off quite fast), but don't dequeue the responses at same
rate. This makes caam response FQs bloat with large number of frames. In
some situations, it makes kernel crash due to out-of-memory. To prevent
it We increase the napi budget of dpseci driver to a big value so that
caam driver is able to drain its response queues at enough rate.
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/caam/caamalg_qi2.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/caam/caamalg_qi2.h b/drivers/crypto/caam/caamalg_qi2.h index be5085451053..973f6296bc6f 100644 --- a/drivers/crypto/caam/caamalg_qi2.h +++ b/drivers/crypto/caam/caamalg_qi2.h @@ -15,7 +15,7 @@ #define DPAA2_CAAM_STORE_SIZE 16 /* NAPI weight *must* be a multiple of the store size. */ -#define DPAA2_CAAM_NAPI_WEIGHT 64 +#define DPAA2_CAAM_NAPI_WEIGHT 512 /* The congestion entrance threshold was chosen so that on LS2088 * we support the maximum throughput for the available memory |