diff options
author | Shahjada Abul Husain <shahjada@chelsio.com> | 2019-12-17 12:12:09 +0530 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2019-12-17 22:33:54 -0800 |
commit | 59437d78f088e506cabdd5e0f0601c531a9830b4 (patch) | |
tree | 72fcc8973604ce5610f6a2df6661a38816ebc004 /drivers/crypto | |
parent | 3646ae0de90eb271ef48ec1fa75e63873ab20fc6 (diff) | |
download | linux-59437d78f088e506cabdd5e0f0601c531a9830b4.tar.bz2 |
cxgb4/chtls: fix ULD connection failures due to wrong TID base
Currently, the hardware TID index is assumed to start from index 0.
However, with the following changeset,
commit c21939998802 ("cxgb4: add support for high priority filters")
hardware TID index can start after the high priority region, which
has introduced a regression resulting in connection failures for
ULDs.
So, fix all related code to properly recalculate the TID start index
based on whether high priority filters are enabled or not.
Fixes: c21939998802 ("cxgb4: add support for high priority filters")
Signed-off-by: Shahjada Abul Husain <shahjada@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/chelsio/chtls/chtls_cm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/chelsio/chtls/chtls_cm.c b/drivers/crypto/chelsio/chtls/chtls_cm.c index aca75237bbcf..72e5b0f65a91 100644 --- a/drivers/crypto/chelsio/chtls/chtls_cm.c +++ b/drivers/crypto/chelsio/chtls/chtls_cm.c @@ -1273,7 +1273,7 @@ static int chtls_pass_accept_req(struct chtls_dev *cdev, struct sk_buff *skb) ctx = (struct listen_ctx *)data; lsk = ctx->lsk; - if (unlikely(tid >= cdev->tids->ntids)) { + if (unlikely(tid_out_of_range(cdev->tids, tid))) { pr_info("passive open TID %u too large\n", tid); return 1; } |