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| author | Sven Auhagen <Sven.Auhagen@voleatech.de> | 2020-07-21 06:37:59 +0200 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2020-07-31 18:08:59 +1000 |
| commit | c6720415907f21b9c53efbe679b96c3cc9d06404 (patch) | |
| tree | 94d7237eb575be5f5c71409e8ff4b9150edac2b9 /drivers/crypto/inside-secure/safexcel.h | |
| parent | 6914dd53eb7af7cbc66edf7992d600b1e952c40d (diff) | |
| download | linux-c6720415907f21b9c53efbe679b96c3cc9d06404.tar.bz2 | |
crypto: inside-secure - irq balance
Balance the irqs of the inside secure driver over all
available cpus.
Currently all interrupts are handled by the first CPU.
From my testing with IPSec AES-GCM 256
on my MCbin with 4 Cores I get a 50% speed increase:
Before the patch: 99.73 Kpps
With the patch: 151.25 Kpps
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/inside-secure/safexcel.h')
| -rw-r--r-- | drivers/crypto/inside-secure/safexcel.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/crypto/inside-secure/safexcel.h b/drivers/crypto/inside-secure/safexcel.h index 94016c505abb..7c5fe382d272 100644 --- a/drivers/crypto/inside-secure/safexcel.h +++ b/drivers/crypto/inside-secure/safexcel.h @@ -707,6 +707,9 @@ struct safexcel_ring { */ struct crypto_async_request *req; struct crypto_async_request *backlog; + + /* irq of this ring */ + int irq; }; /* EIP integration context flags */ |