summaryrefslogtreecommitdiffstats
path: root/drivers/cpuidle
diff options
context:
space:
mode:
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2018-08-22 16:05:02 +0300
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2018-09-25 00:41:04 +0300
commit9144adc5e5a99577bce0d4ee2ca3615f53b9d296 (patch)
treec4c17a883b3ad5bfd38c27fcf08c9e2f89a64be8 /drivers/cpuidle
parent1f98b2a4fd4632db3b585a624032b7ec785a5255 (diff)
downloadlinux-9144adc5e5a99577bce0d4ee2ca3615f53b9d296.tar.bz2
drm: rcar-du: Cache DSYSR value to ensure known initial value
DSYSR is a DU channel register that also contains group fields. It is thus written to by both the group and CRTC code, using read-update-write sequences. As the register isn't initialized explicitly at startup time, this can lead to invalid or otherwise unexpected values being written to some of the fields if they have been modified by the firmware or just not reset properly. To fix this we can write a fully known value to the DSYSR register when turning a channel's functional clock on. However, the mix of group and channel fields complicate this. A simpler solution is to cache the register and initialize the cached value to the desired hardware defaults. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/cpuidle')
0 files changed, 0 insertions, 0 deletions