diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2021-07-04 10:40:29 +0800 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2021-08-05 18:52:11 -0700 |
commit | 0dfe9bf91f9f2993ae73c603571a85e3c6e6fc24 (patch) | |
tree | 9a5bad9fd513b87bc7221284762df95aca9e8159 /drivers/clk | |
parent | 945cb3a105aef63af1354e0fbe10a0d1ca7a32c2 (diff) | |
download | linux-0dfe9bf91f9f2993ae73c603571a85e3c6e6fc24.tar.bz2 |
clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical
The clock source for MSM8916 cpu cores is like below.
|\
a53pll --------| \ a53mux +------+
| |------------| cpus |
gpll0_vote --------| / +------+
|/
So a53mux rather than a53pll is actually the parent clock of cpu cores.
It makes more sense to flag a53mux as critical instead, so that when
either a53pll or gpll0_vote is used by cpu cores, the clock will be kept
enabled while the other can be disabled.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210704024032.11559-2-shawn.guo@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/qcom/a53-pll.c | 1 | ||||
-rw-r--r-- | drivers/clk/qcom/apcs-msm8916.c | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c index af6ac17c7dae..d6756bd777ce 100644 --- a/drivers/clk/qcom/a53-pll.c +++ b/drivers/clk/qcom/a53-pll.c @@ -70,7 +70,6 @@ static int qcom_a53pll_probe(struct platform_device *pdev) init.parent_names = (const char *[]){ "xo" }; init.num_parents = 1; init.ops = &clk_pll_sr2_ops; - init.flags = CLK_IS_CRITICAL; pll->clkr.hw.init = &init; ret = devm_clk_register_regmap(dev, &pll->clkr); diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c index cf69a97d0439..d7ac6d6b15b6 100644 --- a/drivers/clk/qcom/apcs-msm8916.c +++ b/drivers/clk/qcom/apcs-msm8916.c @@ -65,7 +65,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev) init.parent_data = pdata; init.num_parents = ARRAY_SIZE(pdata); init.ops = &clk_regmap_mux_div_ops; - init.flags = CLK_SET_RATE_PARENT; + init.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT; a53cc->clkr.hw.init = &init; a53cc->clkr.regmap = regmap; |