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authorPeng Fan <peng.fan@nxp.com>2020-08-26 15:14:07 +0800
committerShawn Guo <shawnguo@kernel.org>2020-09-07 11:08:50 +0800
commit936c383673b9e3007432f17140ac62de53d87db9 (patch)
treea130a30d156df59bbdf73d91fd7b8a94622266af /drivers/clk
parentf1859198509e4ddc93a24049f814fa0fcee0bfd8 (diff)
downloadlinux-936c383673b9e3007432f17140ac62de53d87db9.tar.bz2
clk: imx: fix composite peripheral flags
According to RM, for peripheral clock slice, "IP clock slices must be stopped to change the clock source.". So we must have CLK_SET_PARENT_GATE flag to avoid glitch. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/imx/clk-composite-8m.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 78fb7e52a42a..2c309e3dc8e3 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -216,6 +216,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
div->width = PCG_PREDIV_WIDTH;
divider_ops = &imx8m_clk_composite_divider_ops;
mux_ops = &clk_mux_ops;
+ flags |= CLK_SET_PARENT_GATE;
}
div->lock = &imx_ccm_lock;