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authorStephen Boyd <sboyd@codeaurora.org>2017-08-02 18:38:01 -0700
committerStephen Boyd <sboyd@codeaurora.org>2017-08-02 18:38:01 -0700
commit8e7be401f2f57673d71a9adf7dd8a9b58ae4e955 (patch)
tree5772b116f3198d203d648437336a9c5ad1072412 /drivers/clk/sunxi-ng
parent1667393126d7c51fad8b3cb9d3798e8e0367e2ec (diff)
parentf54d2cd3c1a231e00732442fca329341d4f4250b (diff)
downloadlinux-8e7be401f2f57673d71a9adf7dd8a9b58ae4e955.tar.bz2
Merge branch 'clk-fixes' into clk-next
* clk-fixes: clk: keystone: sci-clk: Fix sci_clk_get clk: meson: mpll: fix mpll0 fractional part ignored clk: samsung: exynos5420: The EPLL rate table corrections clk: sunxi-ng: sun5i: Add clk_set_rate_parent to the CPU clock
Diffstat (limited to 'drivers/clk/sunxi-ng')
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun5i.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun5i.c b/drivers/clk/sunxi-ng/ccu-sun5i.c
index 194d7bfffa53..ab9e850b3707 100644
--- a/drivers/clk/sunxi-ng/ccu-sun5i.c
+++ b/drivers/clk/sunxi-ng/ccu-sun5i.c
@@ -184,7 +184,7 @@ static struct ccu_mux cpu_clk = {
.hw.init = CLK_HW_INIT_PARENTS("cpu",
cpu_parents,
&ccu_mux_ops,
- CLK_IS_CRITICAL),
+ CLK_SET_RATE_PARENT | CLK_IS_CRITICAL),
}
};