diff options
| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2017-08-21 10:05:01 +0200 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2017-09-07 15:25:52 -0700 |
| commit | 523d3de41f02141f6f6cd497d07946a2837432cf (patch) | |
| tree | d9e059eada1e6e2a3e68c405a25d7f994272b7cf /drivers/clk/samsung/clk.h | |
| parent | d2f18d7e200b8714beffd4eae7f27335b311b2d5 (diff) | |
| download | linux-523d3de41f02141f6f6cd497d07946a2837432cf.tar.bz2 | |
clk: samsung: exynos5433: Add support for runtime PM
Add runtime pm support for all clock controller units (CMU), which belong
to power domains and require special handling during on/off operations.
Typically special values has to be written to MUX registers to change
internal clocks parents to OSC clock before turning power off. During such
operation all clocks, which enter CMU has to be enabled to let MUX to
stabilize. Also for each CMU there is one special parent clock, which has
to be enabled all the time when any access to CMU registers is being done.
This patch solves most of the mysterious external abort and freeze issues
caused by a lack of proper parent CMU clock enabled or incorrect turn off
procedure.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1503302703-13801-4-git-send-email-m.szyprowski@samsung.com
Diffstat (limited to 'drivers/clk/samsung/clk.h')
| -rw-r--r-- | drivers/clk/samsung/clk.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index f0acae4f5d1b..d93031e94387 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -353,6 +353,12 @@ struct samsung_cmu_info { /* list and number of clocks registers */ const unsigned long *clk_regs; unsigned int nr_clk_regs; + + /* list and number of clocks registers to set before suspend */ + const struct samsung_clk_reg_dump *suspend_regs; + unsigned int nr_suspend_regs; + /* name of the parent clock needed for CMU register access */ + const char *clk_name; }; extern struct samsung_clk_provider *__init samsung_clk_init( |