diff options
author | Cao Van Dong <cv-dong@jinso.co.jp> | 2019-04-25 10:25:13 +0900 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-05-21 10:41:31 +0200 |
commit | 54bbb6654450036d1e171fc4d335fa8e942b6f87 (patch) | |
tree | eae50fa25e01e61847deb72dd721295a9575b38e /drivers/clk/renesas | |
parent | a188339ca5a396acc588e5851ed7e19f66b0ebd9 (diff) | |
download | linux-54bbb6654450036d1e171fc4d335fa8e942b6f87.tar.bz2 |
clk: renesas: r8a779{5|6|65}: Add TPU clock
This patch adds the TPU clock on the R-Car r8a7795/r8a7796/r8a77965
SoCs.
Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r-- | drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 | ||||
-rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 | ||||
-rw-r--r-- | drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index 9e9a6f2c31e8..28522c1de38a 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -138,6 +138,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = { DEF_MOD("cmt2", 301, R8A7795_CLK_R), DEF_MOD("cmt1", 302, R8A7795_CLK_R), DEF_MOD("cmt0", 303, R8A7795_CLK_R), + DEF_MOD("tpu0", 304, R8A7795_CLK_S3D4), DEF_MOD("scif2", 310, R8A7795_CLK_S3D4), DEF_MOD("sdif3", 311, R8A7795_CLK_SD3), DEF_MOD("sdif2", 312, R8A7795_CLK_SD2), diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index d8e9af5d9ae9..e4f5db4f29f0 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -134,6 +134,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("cmt2", 301, R8A7796_CLK_R), DEF_MOD("cmt1", 302, R8A7796_CLK_R), DEF_MOD("cmt0", 303, R8A7796_CLK_R), + DEF_MOD("tpu0", 304, R8A7796_CLK_S3D4), DEF_MOD("scif2", 310, R8A7796_CLK_S3D4), DEF_MOD("sdif3", 311, R8A7796_CLK_SD3), DEF_MOD("sdif2", 312, R8A7796_CLK_SD2), diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index 8f87e314d949..46d5a50c6d67 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -132,6 +132,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { DEF_MOD("cmt2", 301, R8A77965_CLK_R), DEF_MOD("cmt1", 302, R8A77965_CLK_R), DEF_MOD("cmt0", 303, R8A77965_CLK_R), + DEF_MOD("tpu0", 304, R8A77965_CLK_S3D4), DEF_MOD("scif2", 310, R8A77965_CLK_S3D4), DEF_MOD("sdif3", 311, R8A77965_CLK_SD3), DEF_MOD("sdif2", 312, R8A77965_CLK_SD2), |