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authorKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>2018-07-25 18:07:05 +0900
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-04-02 10:08:27 +0200
commitc2182095c850a02e150613ac026be99ce1c2ff9f (patch)
tree4ca95281db9a8d23ac095e49a6d888fbcad08d80 /drivers/clk/renesas/r8a774c0-cpg-mssr.c
parent8d36fdcce21c1713eacf45380696f8cec3d724bf (diff)
downloadlinux-c2182095c850a02e150613ac026be99ce1c2ff9f.tar.bz2
clk: renesas: rcar-gen3: Correct parent clock of HS-USB
According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2 Hardware Manual Rev. 0.61, the parent clock of the HS-USB module clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2. Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> [takeshi: Update R-Car H3, M3-N, and E3] Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Update RZ/G2M and RZ/G2E] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/clk/renesas/r8a774c0-cpg-mssr.c')
-rw-r--r--drivers/clk/renesas/r8a774c0-cpg-mssr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index d095787f7d85..c33d3b037081 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -179,7 +179,7 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = {
DEF_MOD("vspi0", 631, R8A774C0_CLK_S0D1),
DEF_MOD("ehci0", 703, R8A774C0_CLK_S3D2),
- DEF_MOD("hsusb", 704, R8A774C0_CLK_S3D4),
+ DEF_MOD("hsusb", 704, R8A774C0_CLK_S3D2),
DEF_MOD("csi40", 716, R8A774C0_CLK_CSI0),
DEF_MOD("du1", 723, R8A774C0_CLK_S1D1),
DEF_MOD("du0", 724, R8A774C0_CLK_S1D1),