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authorGeorgi Djakov <georgi.djakov@linaro.org>2017-12-05 17:47:01 +0200
committerStephen Boyd <sboyd@codeaurora.org>2018-01-02 10:00:25 -0800
commit81ac38847a1d7fdd74a232cae195ff8f0fb4ab21 (patch)
tree1351c95197c1f8ac96cc05251570a1a2565bf4a3 /drivers/clk/qcom/Kconfig
parent081bfeed5f1b8394d993afa6b0ce20ed3e868960 (diff)
downloadlinux-81ac38847a1d7fdd74a232cae195ff8f0fb4ab21.tar.bz2
clk: qcom: Add APCS clock controller support
Add a driver for the APCS clock controller. It is part of the APCS hardware block, which among other things implements also a combined mux and half integer divider functionality. It can choose between a fixed-rate clock or the dedicated APCS (A53) PLL. The source and the divider can be set both at the same time. This is required for enabling CPU frequency scaling on MSM8916-based platforms. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Amit Kucheria <amit.kucheria@linaro.org> [sboyd@codeaurora.org: Include rcg header for parent_map, drop multiple unneeded includes, add COMPILE_TEST to APCS depends, made tristate/modular] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/Kconfig')
-rw-r--r--drivers/clk/qcom/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 49db9fda6548..769e27353e1b 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -22,6 +22,17 @@ config QCOM_A53PLL
Say Y if you want to support higher CPU frequencies on MSM8916
devices.
+config QCOM_CLK_APCS_MSM8916
+ tristate "MSM8916 APCS Clock Controller"
+ depends on COMMON_CLK_QCOM
+ depends on QCOM_APCS_IPC || COMPILE_TEST
+ default ARCH_QCOM
+ help
+ Support for the APCS Clock Controller on msm8916 devices. The
+ APCS is managing the mux and divider which feeds the CPUs.
+ Say Y if you want to support CPU frequency scaling on devices
+ such as msm8916.
+
config QCOM_CLK_RPM
tristate "RPM based Clock Controller"
depends on COMMON_CLK_QCOM && MFD_QCOM_RPM