summaryrefslogtreecommitdiffstats
path: root/drivers/clk/mmp/clk.h
diff options
context:
space:
mode:
authorLubomir Rintel <lkundrak@v3.sk>2020-05-20 00:41:39 +0200
committerStephen Boyd <sboyd@kernel.org>2020-05-27 17:55:11 -0700
commit06030c4e33babd63b6630d358a04f3dfb34cc29c (patch)
treedf09c8881092de255f1fec9faa08139a8d45b58d /drivers/clk/mmp/clk.h
parent8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff)
downloadlinux-06030c4e33babd63b6630d358a04f3dfb34cc29c.tar.bz2
clk: mmp: frac: Do not lose last 4 digits of precision
While calculating the output rate of a fractional divider clock, the value is divided and multipled by 10000, discarding the least significant digits -- presumably to fit the intermediate value within 32 bits. The precision we're losing is, however, not insignificant for things like I2S clock. Maybe also elsewhere, now that since commit ea56ad60260e ("clk: mmp2: Stop pretending PLL outputs are constant") the parent rates are more precise and no longer rounded to 10000s. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200519224151.2074597-2-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mmp/clk.h')
0 files changed, 0 insertions, 0 deletions