summaryrefslogtreecommitdiffstats
path: root/drivers/clk/mediatek/clk-gate.c
diff options
context:
space:
mode:
authorLeonard Crestez <leonard.crestez@nxp.com>2019-04-12 14:10:03 +0000
committerStephen Boyd <sboyd@kernel.org>2019-04-12 14:21:43 -0700
commitf89b9e1be7da8bb0aac667a0206a00975cefe6d3 (patch)
treea052db2d577c89547a1188d072fe8eca197e6027 /drivers/clk/mediatek/clk-gate.c
parentb3cf181c65c4d49f86b67b399fe7203ecac730a9 (diff)
downloadlinux-f89b9e1be7da8bb0aac667a0206a00975cefe6d3.tar.bz2
clk: imx: Fix PLL_1416X not rounding rates
Code which initializes the "clk_init_data.ops" checks pll->rate_table before that field is ever assigned to so it always picks "clk_pll1416x_min_ops". This breaks dynamic rate rounding for features such as cpufreq. Fix by checking pll_clk->rate_table instead, here pll_clk refers to the constant initialization data coming from per-soc clk driver. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-gate.c')
0 files changed, 0 insertions, 0 deletions