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authorPaul Cercueil <paul@crapouillou.net>2020-09-03 03:50:48 +0200
committerStephen Boyd <sboyd@kernel.org>2020-10-13 20:04:50 -0700
commit1a3c4dd4e1633a4482df6dd030a365de6f26de2c (patch)
treef356ab90705fae3755c1af94b78fa9e7fe9e854a /drivers/clk/ingenic
parent2e4ee634f80510b54dee144773c0be3190eb4208 (diff)
downloadlinux-1a3c4dd4e1633a4482df6dd030a365de6f26de2c.tar.bz2
clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
Clocks that don't have a divider are in our case all marked with the CLK_SET_RATE_PARENT flag. In this case, the .round_rate implementation should modify the value pointed to by parent_rate, in order to propagate the rate change to the parent, as explained in the documentation of clk_set_rate(). Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20200903015048.3091523-5-paul@crapouillou.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/ingenic')
-rw-r--r--drivers/clk/ingenic/cgu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c
index a1a4f1adaa3a..dac6edc670cc 100644
--- a/drivers/clk/ingenic/cgu.c
+++ b/drivers/clk/ingenic/cgu.c
@@ -445,6 +445,8 @@ ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate,
div = ingenic_clk_calc_div(clk_info, *parent_rate, req_rate);
else if (clk_info->type & CGU_CLK_FIXDIV)
div = clk_info->fixdiv.div;
+ else if (clk_hw_can_set_rate_parent(hw))
+ *parent_rate = req_rate;
return DIV_ROUND_UP(*parent_rate, div);
}