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authorStephen Boyd <sboyd@kernel.org>2019-04-25 08:31:32 -0700
committerStephen Boyd <sboyd@kernel.org>2019-04-25 08:31:32 -0700
commitd635c3512d3cd38814a77ef40c06078d9a7b1aa3 (patch)
treea8c62f562f656cf625e0318bd3d1f6f0b6e0dd72 /drivers/clk/imx
parent363de1d63e41c8865f3725f7f501ae0ad88530d8 (diff)
parentd058fb60d56b89548028acd6f70b8396e633ffc1 (diff)
downloadlinux-d635c3512d3cd38814a77ef40c06078d9a7b1aa3.tar.bz2
Merge tag 'clk-imx7ulp-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx
Pull i.MX7UPL clk changes from Shawn Guo: - Remove SNVS clock from i.MX7UPL clock driver and bindings, as the clock will be visible on M4 core only, and never be accessed by Cortex-A cores * tag 'clk-imx7ulp-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: clock: imx7ulp: remove SNVS clock clk: imx7ulp: remove snvs clock
Diffstat (limited to 'drivers/clk/imx')
-rw-r--r--drivers/clk/imx/clk-imx7ulp.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c
index ce306631e844..66682100f14c 100644
--- a/drivers/clk/imx/clk-imx7ulp.c
+++ b/drivers/clk/imx/clk-imx7ulp.c
@@ -151,7 +151,6 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np)
clks[IMX7ULP_CLK_DMA1] = imx_clk_hw_gate("dma1", "nic1_clk", base + 0x20, 30);
clks[IMX7ULP_CLK_RGPIO2P1] = imx_clk_hw_gate("rgpio2p1", "nic1_bus_clk", base + 0x3c, 30);
clks[IMX7ULP_CLK_DMA_MUX1] = imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30);
- clks[IMX7ULP_CLK_SNVS] = imx_clk_hw_gate("snvs", "nic1_bus_clk", base + 0x8c, 30);
clks[IMX7ULP_CLK_CAAM] = imx_clk_hw_gate("caam", "nic1_clk", base + 0x90, 30);
clks[IMX7ULP_CLK_LPTPM4] = imx7ulp_clk_composite("lptpm4", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x94);
clks[IMX7ULP_CLK_LPTPM5] = imx7ulp_clk_composite("lptpm5", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x98);