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authorYounian Wang <wangyounian@hisilicon.com>2018-01-24 19:48:24 +0800
committerShawn Guo <shawnguo@kernel.org>2018-02-27 09:19:12 +0800
commit47629f676518f1808dc98c5740a31d8d23c940c7 (patch)
treedd5cd80e2e71658dd938a77882078f587609b75d /drivers/clk/hisilicon
parent055d56891ea7a6bb39444db58ea30eafa5a1cb40 (diff)
downloadlinux-47629f676518f1808dc98c5740a31d8d23c940c7.tar.bz2
clk: hi3798cv200: correct IR clock parent
The IR clock is sourced from '24m' rather than '100m'. Correct it. Signed-off-by: Younian Wang <wangyounian@hisilicon.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'drivers/clk/hisilicon')
-rw-r--r--drivers/clk/hisilicon/crg-hi3798cv200.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c b/drivers/clk/hisilicon/crg-hi3798cv200.c
index c586c79f4623..d7d1ba0153ec 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -244,7 +244,7 @@ static const struct hisi_crg_funcs hi3798cv200_crg_funcs = {
#define HI3798CV200_SYSCTRL_NR_CLKS 16
static const struct hisi_gate_clock hi3798cv200_sysctrl_gate_clks[] = {
- { HISTB_IR_CLK, "clk_ir", "100m",
+ { HISTB_IR_CLK, "clk_ir", "24m",
CLK_SET_RATE_PARENT, 0x48, 4, 0, },
{ HISTB_TIMER01_CLK, "clk_timer01", "24m",
CLK_SET_RATE_PARENT, 0x48, 6, 0, },