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authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2018-03-30 18:44:14 +0900
committerStephen Boyd <sboyd@kernel.org>2018-04-05 15:03:51 -0700
commit6f1aa4ef3f78cc0b42aa1b4c61e356523d88e680 (patch)
tree1eb7304e5d72c615cda2d3f61a73d2e062e72544 /drivers/clk/hisilicon
parent54e1f7ee1f5e8ec8b56e89fc431b3d07f84e9cbd (diff)
downloadlinux-6f1aa4ef3f78cc0b42aa1b4c61e356523d88e680.tar.bz2
clk: uniphier: add additional ethernet clock lines for Pro4
Pro4 SoC has clock lines for Giga-bit feature and ethernet phy, and these are mandatory to activate the ethernet controller. This adds support for the clock lines. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/hisilicon')
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