diff options
| author | Nishanth Menon <nm@ti.com> | 2014-04-11 11:38:10 -0500 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2014-05-05 14:33:19 -0500 |
| commit | 3ae9af7c90f8113365cf2600797115ee35e42d0d (patch) | |
| tree | eac31e2ce235c84e8da9dae4e3f119553562f331 /drivers/bus/omap_l3_noc.c | |
| parent | f0a6e654d8db2dfa3eb8b99380ad449d5e092c33 (diff) | |
| download | linux-3ae9af7c90f8113365cf2600797115ee35e42d0d.tar.bz2 | |
bus: omap_l3_noc: convert target information into a structure
Currently the target instance information is organized indexed by bit
field offset into multiple arrays.
1. We currently have offsets specific to each target associated with each
clock domains are in seperate arrays:
l3_targ_inst_clk1
l3_targ_inst_clk2
l3_targ_inst_clk3
2. Then they are organized per master index in l3_targ.
3. We have names in l3_targ_inst_name as an array to array of strings
corresponding to the above with offsets.
Simplify the same by defining a structure for information containing
both target offset and name. this is then stored in arrays per domain
and organized into an array indexed off domain.
The array is still indexed based on bit field offset.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Darren Etheridge <detheridge@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'drivers/bus/omap_l3_noc.c')
| -rw-r--r-- | drivers/bus/omap_l3_noc.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c index f7d3bf4f7284..343f002a06f7 100644 --- a/drivers/bus/omap_l3_noc.c +++ b/drivers/bus/omap_l3_noc.c @@ -57,6 +57,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) void __iomem *base, *l3_targ_base; void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr; char *target_name, *master_name = "UN IDENTIFIED"; + struct l3_target_data *l3_targ_inst; /* Get the Type of interrupt */ inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; @@ -74,9 +75,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) if (err_reg) { /* Identify the source from control status register */ err_src = __ffs(err_reg); + l3_targ_inst = &l3_targ[i][err_src]; + target_name = l3_targ_inst->name; + l3_targ_base = base + l3_targ_inst->offset; /* Read the stderrlog_main_source from clk domain */ - l3_targ_base = base + l3_targ[i][err_src]; l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN; l3_targ_slvofslsb = l3_targ_base + L3_TARG_STDERRLOG_SLVOFSLSB; @@ -88,8 +91,6 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) switch (std_err_main & CUSTOM_ERROR) { case STANDARD_ERROR: - target_name = - l3_targ_inst_name[i][err_src]; WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n", target_name, readl_relaxed(l3_targ_slvofslsb)); @@ -99,8 +100,6 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) break; case CUSTOM_ERROR: - target_name = - l3_targ_inst_name[i][err_src]; for (k = 0; k < NUM_OF_L3_MASTERS; k++) { if (masterid == l3_masters[k].id) master_name = |